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Permalink CVE-2026-53374
8.8 HIGH
  • CVSS version (CVSS): 3.1
  • Attack Vector (AV): Local (L)
  • Attack Complexity (AC): Low (L)
  • Privileges Required (PR): Low (L)
  • User Interaction (UI): None (N)
  • Scope (S): Changed (C)
  • Confidentiality (C): High (H)
  • Integrity (I): High (H)
  • Availability (A): High (H)
  • Modified Attack Vector (MAV): Local (L)
  • Modified Attack Complexity (MAC): Low (L)
  • Modified Privileges Required (MPR): Low (L)
  • Modified User Interaction (MUI): None (N)
  • Modified Confidentiality (MC): High (H)
  • Modified Scope (MS): Changed (C)
  • Modified Integrity (MI): High (H)
  • Modified Availability (MA): High (H)
created 6 days, 3 hours ago Activity log
  • Created & dismissed (max. allowed matches exceeded) suggestion
drm/amdgpu: zero-initialize GART table on allocation

In the Linux kernel, the following vulnerability has been resolved: drm/amdgpu: zero-initialize GART table on allocation GART TLB is flushed after unmapping but not after mapping. Since amdgpu_bo_create_kernel() does not zero-initialize the buffer, when a single PTE is written the TLB may speculatively load other uninitialized entries from the same cacheline. Those garbage entries can appear valid, and a subsequent write to another PTE in the same cacheline may cause the GPU to use a stale garbage PTE from the TLB. Fix this by calling memset_io() to zero-initialize the GART table with gart_pte_flags immediately after allocation. Using AMDGPU_GEM_CREATE_VRAM_CLEARED, SDMA-based clear will not work since SDMA needs GART to be initialized to work. (cherry picked from commit d9af8263b82b6eaa60c5718e0c6631c5037e4b24)

Affected products

Linux
  • <91fbb5e635c8fb1b49e15c19da06480089ef719f
  • =<6.18.*
  • <e6c2e6c2e1fa066968a16aca1cb66cd1bdde7741
  • <40df11255d71b02e20e70579f1b12b687e396e26
  • =<7.0.*
  • =<6.12.*
  • =<6.1.*
  • =<*
  • =<6.6.*
  • <791941be5da125d9a1b228582bfdc300c05d05b3
  • <b17175d0a375b3ed5e81597dac4983fdb46e478d
  • <8ae8b9e74bab94aab1d79f1688129bcc61c8b29a
  • ==4.2
  • <4.2